preliminary EUP7522 ds7522 ver 0.5 march. 2006 1 dual, 600ma ldo regulator description the EUP7522 is an efficient, precise dual-channel cmos ldo regulator with very-low dropout voltage and low ground current. both regulator outputs are capable of sourcing 600ma of output current. the EUP7522?s performance is optimized for cd/dvd -rom, cd/rw or wireless communication supply applications, the EUP7522 regulators are stable with output capacitors as low as 2.2 g f. key features include current limit, thermal shutdown, fast transient response, high output accuracy, and high ripple rejection ratio. the EUP7522 regulator is available in a fixed 3.3v/2.5v output voltage configuration. features z low quiescent current (typically 130 g a) z guaranteed 600ma output current z low dropout voltage:600mv at 600ma z wide operating voltage ranges : 2.5v to 5.5v z ultra-fast transient response z tight load and line regulation z current limiting protection z thermal shutdown protection z only low-esr ceramic capacitors required for stability z available in sop-8 package z rohs compliant and 100% lead (pb)-free applications z cd/dvd-rom, cd/rw z wireless lan card/keyboard/mouse z battery-powered equipment z xdsl router typical application circuit figure 1.
preliminary EUP7522 ds7522 ver 0.5 march. 2006 2 pin configurations part number pin configurations EUP7522 sop-8 pin description pin pin name description 1 v out1 regulator a output 2,3 v in power input 4 v out2 regulator b output 5,6,7,8 gnd ground block diagram figure 2.
preliminary EUP7522 ds7522 ver 0.5 march. 2006 3 ordering information order number package type marking operating temperature range EUP7522-3.3/2.5dir1 sop-8 xxxx EUP7522 i -40 c to 85c EUP7522-3.3/2.5dir0 sop-8 xxxx EUP7522 i -40 c to 85c * for other output voltage options, contact eut marketing. EUP7522 ???? / ???? ?? ?? ?? ?? lead free code 1: lead free 0: lead packing r: tape & reel operating temperature range i: industry standard package type d: sop output voltage option
preliminary EUP7522 ds7522 ver 0.5 march. 2006 4 absolute maximum ratings t supply input voltage --------------------------------------------------------------------------------------- 6v t package thermal resistance sop-8, jc -------------------------------------------------------------------------------------------------- 15.7c/w t lead temperature (soldering,10 sec .) -------------------------------------------------------------------- 260c t junction temperature ---------------------------------------------------------------------------------------- 150c t storage temperature rang, t stg -------------------------------------------------------------------------- -65c to 150c t esd susceptibility hbm ---------------------------------------------------------------------------------------------------------- 2kv mm ----------------------------------------------------------------------------------------------------------- 200v recommended operating conditions t supply input voltage -------------------------------------------------------------------------------------- 2.5v to 5.5v t junction temperature ------------------------------------------------------------------------------------- -40c to 125c electrical characteristics unless otherwise noted these specifications apply over full temperature, c in =2.2f, c out 1=2.2f , c out 2 = 2.2f, t j =0 to 125c. typical values refer to t j =25c. EUP7522 symbol parameter conditions min t yp max. unit vin input voltage 2.5 5.5 v ots over temperature shutdown 150 c over temperature shutdown hysteresis hysteresis 20 c tc output voltage temperature coefficient 40 ppm/c i out 1=300ma, i out 2=300ma 360 i q quiescent current i out1 =0ma, i out 2=0ma 130 200 a regulator 1 v out output voltage v in =5v v out- 2% 3.3 v out+ 2% v i limit circuit current limit v in =v out + 1v 900 ma i out load current v in =v out + 1v 600 ma reg line line regulation v out + 1v preliminary EUP7522 ds7522 ver 0.5 march. 2006 5 electrical characteristics( cont.) unless otherwise noted these specifications apply over full temperature, c in =2.2f, c out 1=2.2f , c out 2 = 2.2f, t j =0 to 125c. typical values refer to t j =25c. eua7522 symbol parameter conditions min typ max. unit regulator 2 v out output voltage v in =5v v out-2% 2.5 v out+2% v i limit circuit current limit v in =v out + 1v 900 ma i out load current v in =v out + 1v 600 ma reg line line regulation v out + 1v preliminary EUP7522 ds7522 ver 0.5 march. 2006 6 typical operating characteristics
preliminary EUP7522 ds7522 ver 0.5 march. 2006 7
preliminary EUP7522 ds7522 ver 0.5 march. 2006 8 application information input capacitor a minimum input capacitance of 2.2 f is required between the EUP7522 input pin and ground (the amount of the capacitance may be increased without limit).this capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean analog ground. any good quality ceramic, tantalum, or film capacitor may be used at the input. if a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. no-load stability the EUP7522 will remain stable and in regulation with no external load. this is specially important in cmos ram keep-alive applications. output capacitance the EUP7522 is specifically designed to employ ceramic output capacitors as low as 2.2 f. ceramic capacitors below 10 f offer significant cost and space savings, along with high frequency noi se filtering. higher values and other types and of capacitor may be used, but their equivalent series resistance (esr) should be maintained below 0.5 ? . ceramic capacitor of the value required by the EUP7522 are available in the following dielectric types: z5u, y5v, x5r, and x7r. the z5u and y5v types exhibit a 50% or more drop in capacitance value as their temperature increase from 25c, an important consideration. the x5r generally maintain their capacitance value within 20%. the x7r type are desirable for their tighter tolerance of 10% over temperature. power dissipation and junction temperature specified regulator operation is assured to a junction temperature of 125c; the maximum junction temperature should be restricted to 125c under normal operating conditions. this restriction limits the power dissipation the regulator can handle in any given application. to ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, p d(max) , and the actual dissipation, p d , which must be less than or equal to p d(max) the maximum-power-dissipation limit is determined using the following equation: where: t jmax is the maximum allowable junction temperature. r ja is the thermal resistance junction-to-ambient for the package t a is the ambient temperature. the regulator dissipation is calculated using: p d =(v i -v o ) i o power dissipation resulting from quiescent current is negligible. excessive power dissipation triggers the thermal protection circuit. ja a j d(max) r t max t p ? =
preliminary EUP7522 ds7522 ver 0.5 march. 2006 9 packaging information z y x standard solder map dimension in millimeters dimension in inches symbols min. max. min. max. a 4.80 5.00 0.189 0.197 b 5.80 6.20 0.228 0.244 c 3.80 4.00 0.150 0.157 d 1.194 1.346 0.047 0.053 e 1.45 1.55 0.057 0.061 h 0.00 0.10 0.000 0.004 f 0.33 0.51 0.013 0.020 l1 0.19 0.25 0.007 0.010 l2 0.40 1.27 0.016 0.050 m 0 8 0 8 n 40 50 40 50 8 ? lead sop plastic package
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